The present invention is generally directed to reference signal generators for use in integrated circuits, and more specifically, to a reference signal generator that generates a reference signal having a highly accurate, adjustable duty signal.
There are a myriad number of applications in which an integrated circuit (IC) requires a reference signal generator. These applications encompass both digital devices and analog is devices. Reference signal generators typically supply clock signals that drive a processing circuit at a desired (or target) speed (or frequency). Often, one or more of the signal parameters (i.e., frequency, amplitude, duty cycle) of the reference signal is adjustable.
One important signal parameter is duty cycle. The duty cycle of a reference signal is the percentage of one cycle. (or period) of the reference signal when the reference signal is high (or Logic 1). For example, a 200 KHz reference signal has a T=5 microsecond period. If the 200 KHz reference signal is high (e.g., Logic 1) for 2 microseconds and low (e.g., Logic 0) for 3 microseconds, the 200 KHz reference signal has a 2/5=40% duty signal. Similarly, if the 200 KHz reference signal is high for 2.5 microseconds and low for 2.5 microseconds, the 200 KHz reference signal has a 50% duty signal (i.e., a square wave).
However, many applications require high precision and operate under extreme temperature conditions. One typical example is a cell phone, which typically includes high-precision components and may operate in temperatures from sub-zero to 100+degree. For these types of applications, a conventional reference signal generator may experience significant variations in the duty cycle of the reference signal across such a wide range of operating conditions.
Therefore, there is a need in the art for reference signal generators that generate reference signals having variable duty cycles. In particular, there is a need for reference signal generators that produce highly accurate duty cycles across a wide range of operating conditions.
To address the above-discussed deficiencies of the prior art, it is a primary object of the present invention to provide a reference signal generator for generating an output reference signal having a target duty cycle. According to an advantageous embodiment of the present invention, the reference signal generator comprises: 1) a sawtooth generator capable of receiving an input reference signal having a reference frequency and generating a sawtooth waveform having the reference frequency; 2) first comparison circuitry capable of comparing the sawtooth waveform to a reference voltage and generating the output reference signal, wherein the output reference signal is Logic 1 when the sawtooth waveform is greater than the reference voltage and the output reference signal is Logic 0 when the sawtooth waveform is less than the reference voltage; and 3) feedback circuitry capable of determining a duty cycle of the output reference signal by comparing a first time period when the output reference signal is Logic 1 to a second time period when the output reference signal is Logic 0, wherein the feedback circuitry adjusts a value of the reference voltage to cause the output reference signal to achieve the target duty cycle.
According to one embodiment of the present invention, the feedback circuitry comprises a first charging circuit capable of charging a first capacitor when the output reference signal is Logic 1 and discharging the first capacitor when the output reference signal is Logic 0.
According to another embodiment of the present invention, the feedback circuitry comprises a second charging circuit capable of charging a second capacitor when the output reference signal is Logic 0 and discharging the second capacitor when the output reference signal is Logic 1.
According to still another embodiment of the present invention, the feedback circuitry comprises an operational amplifier for generating the reference voltage, the operational amplifier having a non-inverting input coupled to the first capacitor and an inverting input coupled to the second capacitor, wherein the operational amplifier increases the reference voltage as a first charging voltage on the first capacitor increases with respect to a second charging voltage on the second capacitor and wherein the operational amplifier decreases the reference voltage as the first charging voltage on the first capacitor decreases with respect to the second charging voltage on the second capacitor.
According to yet another embodiment of the present invention, the non-inverting input of the operational amplifier is coupled to the first capacitor by a first selectable voltage divider resistor array.
According to a further embodiment of the present invention, the inverting input of the operational-amplifier is coupled to the second capacitor by a second selectable voltage divider resistor array.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms xe2x80x9cincludexe2x80x9d and xe2x80x9ccomprise,xe2x80x9d as well as derivatives thereof, mean inclusion without limitation; the term xe2x80x9cor,xe2x80x9d is inclusive, meaning and/or; the phrases xe2x80x9cassociated withxe2x80x9d and xe2x80x9cassociated therewith,xe2x80x9d as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term xe2x80x9ccontrollerxe2x80x9d means any device, system or part thereof that controls at least one operation, such a device may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.